The development background of PCI Express
2017-01-19

Computer I / O technology is a key technology in the development of high performance computing. Its technical characteristics determine the computer I / O processing power, and then determine the overall performance of the computer and application environment. Fundamentally, I / O technology will restrict the application and development of computer technology both now and in the future, especially in the field of high-end computing. In recent years, with the high-end computing market is increasingly active, the competition of high-performance I / O technology is becoming increasingly fierce. 


When the contradiction has becoming increasingly serious between the computer processing power and bus data transfer speed. The new bus technology should be born. Over the past decade, PCI (Peripheral component Interconnect) bus is successful. Its parallel bus execution mechanism is still very advanced now, but its bandwidth has long been showing weakness, PCI bus is divided into six specifications (shown in Table 1), data transfer rate provided by it from 133MBps to 2131MBps. For high-performance products such as 10 Gigabit Ethernet or fiber-optic communications, the data transfer rates of traditional PCI has been unable to meet the requirements. 

6 specifications of PCI bus

Bus type

Bus form

Clock frequency

Peak bandwidth

 Numbers of slots

PCI32Bits

parallel

33MHz

133MB/s

4-5

PCI32Bits

parallel

66MHz

266MB/s

1-2

PCI-X 32Bits

parallel

66MHz

266MB/s

4

PCI-X 32Bits

parallel

133MHz

533MB/s

1-2

PCI-X 32Bits

parallel

266MHz

1066MB/s

1

PCI-X 32Bits

parallel

533MHz

2131MB/s

1

For a 64-bit bus implementation, all of the above bandwidths are doubled.

For a 64-bit bus implementation, all of the above bandwidths are doubled, and careful analysis of traditional PCI signaling techniques, we can find that parallel buses have come to the limits of their performance, and the bus has not been able to easily boost the frequency or reduce the voltage to improve the data transfer rate: its clock and data synchronous transmission are restricted by signal offset and PCB layout. With the introduction of high-speed serial bus, has successfully resolved these problems, its representative application is PCI Express.

PCI Express uses serial mode, and use the "voltage differential transmission" that is the two signal lines and voltage difference as logic "0", "1", using this way the transmission frequency can be highly enhanced, the signal is easy to read, and reduce the noise impact. Because of differential transmission, so every two signal lines can be a one-way transmission of one bit, that is, a signal line is positive, the other signal line is negative, each of the two "1-bit" signal lines is referred to as a differential pair. According to the PCI Express specification, the transmission rate of one differential pair is 2.5 Gbps.

In actual use, two differential pairs are used as a link for transmission and reception, this mechanism makes the data bandwidth can be flexible deployment. According to the relevant standard PCI-Express bus can transmit at xl / x2 / x4 / x8 / x12 / x16 / x32 (as shown in Table 2), and 5Gbps to 160Gbps transmission bandwidth can be provided. When a channel within the system needs higher bandwidth, you can maneuver multiple links to the channel, so that transmission bandwidth to meet the surge in demand for data transmission time.

PCI-Express Multi-Link Transfer Rate Table

PCI Express

Link width

X1 

X2 

X4

X8

X12

X16

X32 

Transfer bandwidth (Gb/s)

5.0

10.0

20.0

40.0

60.0

80.0

160.0

Effective bandwidth

(Gb/s)

4.0

8.0

16.0

32.0

48.0

64.0

128.0

8b/10b encoding makes the actual effective data bandwidth loss of 20%, each link contains a pair of send / receive module, each module transmission bandwidth is 2.5Gb/s.

In addition to changes in the transmission mode, there is a more meaningful change: changes in connection mode. PCI Express uses point-to-point connection, it is more important step forward than the shared approach of PCI bus. PCI Express uses a more advanced connection method: point-to-point connection. Each device requires an independent transmission channel for data transmission. This channel is closed for other devices. This mode of operation ensures the specificity of channel, avoids interference from other devices, and increases the quality and reliability of the signal. Because it is point to point connection, so that ensures its scalability. PCI-Express is only the expansion of the bus, has nothing to do with the operating system, also to ensure compatibility with the original PCI, and has brought convenience for users to upgrade. The following figure shows the topology of PCI-Express.

The topology of PCI-Express

The topology of PCI-Express
PCI Express not only has the high performance transmission rate, moreover its versatility also has the vital significance. Because of its common mode, it can be used for the North-South bridge and other equipment connections, can also be extended to the chipset connection, or even can be used to connect graphics chip. So that the entire computer I / O system will be reunified, and will further simplify the computer system, so that it has a stronger versatility. PCI Express has changed the traditional PCI parallel bus architecture, so it has more advanced bandwidth advantages than other I / O technologies, and gradually overtake the trend of PCI and PCI-X over time. PCI Express is widely considered to be a revolutionary bus technology, the importance of it can meet the needs of different users. With the increasing demand for bandwidth in the future, PCI Express has a wide range of applications.
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